1. Field of the Invention
The present invention relates to a wafer-level package method, and more particularly, to a method that enables wafer-level testing, and provides hermetical windows to devices.
2. Description of the Prior Art
The package process is an important step to the back-end process of semiconductor or MEMS manufacture, and crucial to the yield and cost.
Please refer to FIG. 1 to FIG. 4. FIG. 1 to FIG. 4 are schematic diagrams illustrating a conventional method for package. As shown in FIG. 1, a device wafer 10 is provided. The device wafer 10 includes devices 12 to be packaged, inter-connection layers (not shown), and contact pads (not shown) disposed thereon. A cutting process is then performed by a cutting apparatus to divide the device wafer 10 into a plurality of device dies 14 according to pre-defined scribe liens.
As shown in FIG. 2, a cap wafer 20 is provided, and another cutting process is performed to divide the cap wafer 20 into a plurality of protection caps 22. The size of each protection cap 22 is equal to or slightly smaller that that of each device die 14. As shown in FIG. 3, a bonding adhesive 30 e.g. a polymer adhesive is coated on the surface of the device die 14. As shown in FIG. 4, the protection cap 22 is adhered to the device die 14 with the bonding adhesive 30, and necessary clean processes are performed.
For an optical device or a MEMS device, this device requires a sensor area or an operation area, and thus a transparent hermetical window or a hermetical room has to be formed. Consequently, the device is prevented from being contaminated by air, dust or humidity. In addition, the device can be free from mechanical or radioactive influences. The hermetical room also prevents the gas leakage problem and breakage of vacuum. In fact, the quality of the hermetical room or window somehow reflects the reliability of the optical devices or MEMS devices.
The thermal stability of the polymer adhesive, however, is not good, and the reliability of the devices is therefore degraded. For the optical or MEMS devices that have high hermetical requirement, the conventional method is not adaptive. In addition, the conventional package is carried out after the device wafer is diced, thus the device die has to be packaged individually, even manually. This seriously influences the efficiency and yield of the back-end package process, and increases the cost.